| [val=None][, delay=0]) |
A Signal object has the following attributes:
This attribute is always available to access the current value;
however in many practical case it will not be needed. Whenever there
is no ambiguity, the Signal object's current value is used
implicitly. In particular, all Python's standard numeric, bit-wise,
logical and comparison operators are implemented on a Signal object by
delegating to its current value. The exception is augmented
assignment. These operators are not implemented as they would break
the rule that the current value should be a read-only attribute. In
addition, when a Signal object is assigned to the next
attribute of another Signal object, its current value is assigned
instead.
'reg' and 'wire'.
This attribute is useful when the Verilog converter cannot infer automatically whether and how a signal is driven. This occurs when the signal is driven from user-defined Verilog code.
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