From Python to silicon
[[
meps:mep-102
]]
Trace:
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myhdl.org
Welcome to MyHDL
The Development Zone
MyHDL Enhancement Proposals
Introduction
Creating generators with decorators
User-defined Verilog code
myhdl.org
Tristate and bidirectional signals
Shadow signals
myhdl.org
MEP:
102
Author:
Jan Decaluwe
Status:
Created:
MyHDL-Version:
Undefined
This space is reserved for a proposal for a MyHDL web site. The draft is being developed
here
.
meps/mep-102.txt · Last modified: 2007/05/07 13:41 by jandecaluwe
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