This unique effort combines an FPGA with a real analog filter for the best possible sound.
The digital portion of the SID chip is implemented on an FPGA (Field-Programmable Gate Array) and the analog portion is done on real analog circuits. The design is based on interviews with the SID's creator Bob Yannes, original datasheets, and (soon) comparisons with real SID chips.
PhoenixSID can be controlled in realtime by a host computer via a USB2.0 connection. A drop-in replacement for the original SID is also feasible.
Use of Python
PhoenixSID's hardware design, drivers, tests, and demos are all done using the Python programming language. This approach has made me more productive than I thought possible, and I'm having a great time. Python and MyHDL rock!
The “Launch Control” briefcase contains a road-worthy setup that's been demoed live at UMass Lowell. Yes, I plan on shrinking it down