From Python to silicon
[[MEP: Signal Struct]]
 
Trace: • User-defined Verilog code • Creating generators with decorators • MyHDL implementation of the ZPU processor • DSPSYS Simple DSP Testbenches • MEP: Signal Struct

MEP: Signal Struct

@TODO MEP write up.

user/cfelton/projects/mep_sig_struct.txt · Last modified: 2010/01/13 12:40 by cfelton
 
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